-- 32 bit version program counter
-- bowmanb

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity pc is
  port
    (
      clk    : in  std_logic;
      nReset : in  std_logic;
      halt   : in  std_logic;
      -- Write data input port
      default : in std_logic_vector(31 downto 0);
      pcin   : in  std_logic_vector (31 downto 0);
      -- read port 2
      pcout  : out std_logic_vector (31 downto 0)
      );
end pc;

architecture pc_arch of pc is

  signal reg : std_logic_vector(31 downto 0);

begin

  -- registers process
  registers : process (clk, nReset, halt, pcin,default)
  begin

    -- one register if statement
    if (nReset = '0') then
      -- Reset here
      
      reg <= default;
      
      
    elsif (falling_edge(clk)) then
      -- Set register here
      if(halt = '0') then
        reg <= pcin;
      end if;
    end if;
    
  end process;

  pcout <= reg;

end pc_arch;
